Miniaturized opto and microwave receiver module using DCCPWs (Double Conductor Coplanar Waveguides) have been developed for active phased array antennas. The module comprised by a microstrip-to-slot transition, two chips of low-noise MMIC amplifiers, and a laser diode module is fabricated on an ultra-thin package with 10301.5 mm3 in size and 2 g in weight to achieve an ultra-thin structure of active phased array antenna panels. The ultra-thin structure is attributed to the design of low-noise MMIC amplifiers using DCCPWs and laser diode modules using silicon V-groove technology and fiber alignment method.

The paper presents the analysis, design and performance of PCB (Printed Circuit Board)-based cross-coupled differential VCOs using a novel LC-tank. As compared with the conventional LC-tank, a novel LC-tank is comprised of only chip inductors and thus has an advantage in providing a higher cutoff frequency. This feature attributes to the use of the parasitic elements of the chip inductors and capacitors. The cutoff frequencies were compared for both LC-tanks by calculation, simulation and measurement. Then the traditional cross-coupled differential oscillators having both LC-tanks were designed, fabricated and performed by using 0.35µm SiGe HBTs and 1005-type chip devices. The implemented oscillator using a novel LC-tank has shown a 0.12GHz higher oscillation frequency, while phase noise characteristics were almost the same. In addition, the cross-coupled differential oscillator utilizes a series RL circuit in order to suppress the concurrent oscillations. The implemented cross-coupled differential VCO employing Si varactor diodes with a capacitance ratio of 2.5 to 1 has achieved a tuning frequency of 0.92 to 1.28GHz, an output power greater than -13.5dBm, a consumed power less than 8.7mW and a phase noise at 100kHz offset in a range from -104 to -100dBc/Hz.

A 4-12 GHz 2 W GaAs HFET amplifier has been developed. It employs two novel circuit design techniques. One is a pre-matching circuit for dual gate-bias feed. It is comprised of two shunt LCR circuits, which makes dual gate-bias feed possible. The other one is a tapered power splitting/combining FET (tapered PS/PC FET), which makes amplitude and phase imbalance between FET cells small over a wide bandwidth. In this paper, the schematic diagram and impedance characteristic of the pre-matching circuit for dual gate-bias feed are described first, showing the conditions that the impedance of FETs becomes purely resistive. Then the amplitude and phase imbalance between FET cells are compared by electromagnetic simulation for both the conventional and tapered PS/PC FETs, demonstrating that the tapered PS/PC FET has smaller amplitude and phase imbalance. Furthermore, the MSG/MAG are compared by experiment for both FETs, confirming that the tapered PS/PC FET has higher MSG/MAG. Finally, the design, fabrication, and performance of the 4-12 GHz 2 W GaAs HFET amplifier using the pre-matching circuit for dual gate-bias feed and tapered PS/PC FETs are presented to make sure that two novel circuit design techniques introduced in this paper are useful for the design of wideband lossy match power amplifiers.

A direct calculation method of efficiency and power of FETs from d.c. characteristics determined by knee and breakdown voltages is proposed to make clear the requirements for knee and breakdown voltages of FETs under low-voltage operation of power amplifiers. It is shown from the calculation that the breakdown voltage has a greater effect on power and efficiency than the knee voltage and has to be three or more times of the operating voltage in order not to degrade efficiency under class-AB operation. A 3.3 V UHF-band 3-stage high efficiency and high power monolithic amplifier has been developed with the use of power FETs satisfying the requirements for knee and breakdown voltages under low-voltage operation. A power-added efficiency of 57.3% and a saturated output power of 31.8 dBm have been achieved for a drain voltage of 3.3 V in UHF-band. The direct calculation method of efficiency and power from d.c. characteristics, which can provide the required knee or breakdown voltage for a given efficiency, power, or bias conditions, is considered to be useful for developing power devices with various requirements for efficiency, power, and bias conditions.